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I tried to build the circuit in logisim and as far as i can see the truth table is correct, the state diagram should then look like this:
Where the arrows are only when we get clock is 1, because when clock is 0 "it is always the same state as the input".
Thank you all for your replys, and dont worry this is an old exam from 2013 im practicing on.
But im still not there yet, i tried to do a timing diagram and im stuck in a loop. All three flip flops are activated on falling edges. But from what i can see Qa have 0 at first tick, that means that...
Here is my truth table thus far, i have not bothered with clock(X) is 0 because it is always the same state as the input according to what i can see this far.
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