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Recent content by india1234

  1. I

    How to compile VHDL files that are below the Verilog at the top level using VCS MX?

    i am new with vcs mx.i have verilog at top level and vhdl file are bellow it .i could not able to run it .what i have to do for compiling those vhdl files ?
  2. I

    can anyone tell me the diif b/w tlm_fifo and mailbox in SV?

    can anyone tell me the diif b/w tlm_fifo and mailbox in SV? what are their prons ans cons?
  3. I

    clock distrbution over IC

    thank u
  4. I

    VLSI career in Bangalore & Schools on VLSI

    Re: VLSI CAREER search for a small concern.......... many companies dont recruit freshers instead they they give intenship (as project work) and on the performance they give job Added after 2 minutes: companmy like synopsys, frescale and LSI logic recruits through intenship
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