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the thing i noticed is by changing the input impedance (i added a filter before the amplifier and compensated for the filter losses) the current drop is not the same, i have 20mA drop instead of the 60mA.
I also did combine a pulse that will saturate the amplifier with a CW that will keep the...
Can you please explain how the input signal can change the Bias point? do you have any documentation about this kind of phenomenon?
As i understand it an LNA is a class A amplifier, and its bias point should not be dependant on the input signal.
Hi guys,
I'm using a commercially available amplifier with the recommended PCB layout, We have noticed that when we put an input power that would push it into the saturated region, the current drops out from 120mA to somthing between 30 and 60mA. Why do you this is the case?
Thanks in advance.
Here is the layout of the
and this is the bias circuitry
The application where i m using it won't require the LNA to be saturated all the time, but at the beginning, it's going to be saturated for a small laps of time (i need to aquire that pulse too) and then it'll go back to being...
Hi guys!
I've designed a simple common emitter LNA at 10GHz, i ve used it in many CW applications with no major problems. However i tried to amplify a 4us pulse (a cosine of constant magnitude) and i notice a pulse distortion when the LNA is saturated, where the signal magnitude is higher at...
When do you know it's wrongly placed?
you mean i sould be matching before the bias T and the DC block? why does the way i did it work on simulation but not in real life?
would that be relevant if the bias T doesnt do its work ot in all cases?
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How do i do that? by putting...
Yes, my simulations are Layout+schematics:
The capacitors C1/C2/C3/C4 are simulated using the model provided by murata however the other components are ideal componenets during the simulation as they are LF components used just for biasing and the RF signal doesn't go there because of the bias...
If you take a look at this application note provided by NXP on their BFU730F, you'll see that they don't have the same results as their simulation:
https://www.nxp.com/docs/en/application-note/AN11010.pdf
My design is as shown below: for the capacitors on the RF line i used the capacitor model...
Hi guys!
I've been trying to design an LNA using BJT transistor, on the first try the results of my simulations and measurements were different and i concluded that it must have been related to the permittivity of the substrate (i had a resonator on the board) . so i redesigned the LNA using...
Hi guys,
I'm a total beginner to PID contoller and i'm trying to use it so i would like some help but i'm having some basic questions:
In my system the PID will be on the feedback and not on the open loop. does that change anything? and what tuning method would you advise me to use?
I would...
I actually didn't need to use a matching network, since i did put a quarter wavelenght line between the two stages.
I'm sorry if this sounds like a dumb question, i really don't have much experience, but is a shunt component soldered the way i did it, or do i need to have a line coming down...
Hi guys,
I'm trying to design a limiter, and i'd appreciate some help.
I'm using the Skyworks CLA4603 Pin diode, it's supposed to limit starting from 10dBm and i'm working at 9.4GHz.
Now in my design i simply printed a Microstrip Line and i soldered the anode of the diode on the line and the...
I actually was expecting a gain of 10dB
I have measured Vce for different Pin, and it actually changes with Pin. which apparrently happens for gain expansion
Here is the design and the transistor i'm using is the BFU760F
Yes, the gain i considered as linear gain is the one at -15dBm
Here is a graph of Gain Vs Input power.
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I'm going to look into that, thank you
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