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Simulation still not work with HSPICE. But the same circuitis is working with HSIM, without problems and very quickly.
Maybe is a HSPICE bug ? I am using version 2003.6
I tried to change timestep, I tried some another .OPTIONS. Still not work.
But I maded a simulation with some TSMC models and it's working. Maybe ST models are too complex ? They used transistor modelling as .subckt type, with a base model and internal equations that are changing some...
I am simulating a chain of IO module for ground bounce characterisation. These modules are identic. With two or three modules simulation is working, but for more not. Error mesages are:
- "internal timestep too small in transient analysis"
I changed some .OPTIONS statement, but it 's useless...
Re: Cadence upgrade
Yes , I have version 5.001, I think is the first version. So, is it possible to upgrade only with ISR 5.033 ? Of course, in the same hierarchy.
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