Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by ilik

  1. I

    Lattice Radiant Warnings list

    can't find warning explanations list for Lattice Radiant software. any hints? or links? if not, have anyone messed with Radiant's Floorplan view Grouping? i have grouped a whole instance in a single group (called "grp") and it says: WARNING - The group 'grp' constraint has more than 32 comps...
  2. I

    Altium 14 Signal Integrity Stimulus Rule issue

    altium 10 did SI stimulus without problems. i was giving all parameters and set the stimulus rule to periodic and everything is well in SI simulation. but in altium 14.1 i am doing the same thing but SI simulation still sticks to it's default frequency (60ns period )and single pulse option...
  3. I

    Analog to Digital Converter VHDL Code

    you are trying to build Simultaneous Sampling SAR ADC which has integrated DAC inside.by looking at datasheet circuit, it looks like fully digital device but in fact its analog/digital hybrid. one half of SAR converter is mostly digital, since it uses registers. but input to the converter is...

Part and Inventory Search

Back
Top