Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I would like to create separate .RUL files for different drill/mill classes.
Some manufacturers have different constraints for external and internal layers. With clearances is quite easy to define a rule for every layer, but what about vias?
For example, I need a via style which minimums are...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.