Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello!
While designing a SAR ADC i found out that Rail-to-Rail OpAmp that i used, have non-linear offset in relation to common mode. That has caused in high INL(though DNL is good).
I think that this happened because input make up from 2 differential pairs nfet and pfet. When common mode near...
Thank you for reply, so the value of voltage breakdown in process specification is stated for DC voltages. For impulse signals it will be higher and better determine it experimentally. Am i right?
Hello, i have a questions about ESD protection. I was simulating HBM discharge to chip, and looking to voltage on pads. I wanted to check exceeds it breakdown voltage of gate oxide or not. As I understand exist two types of breakdown hard and soft(time-dependent gate oxide breakdown), should i...
RapidIO specification (3xN) for LP-serial physical layer, defines transmitter and receiver characteristics (like differential output voltage, differential input voltage, total jitter etc), but i can't find a definition of type of transmitter and receiver. Does it matter what type of transmitter...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.