Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello all,
I have server ACer G710 and i install Sun OS 10.
I read on Sun web site and i see that Synopsys DC family are available on Sparc system.
Now i want install Dc on x86 system. How can i do?
Please help me.
Thank you very much
Hello all,
I have a linux box (Dual Xeon ET64 3.2G, 8G Memory). I install SynV2003.12-SP1 on this linux box (using Redhat AS 3.0 with 2.4.21-27.0.4 kernel). When i synthesize my design, this software only use about 3.0GB memory and be out of memory.
What problem with this software????
Thank you...
Hello all,
I use dc 2..3.06-SP1 on Linux AS30 with 4GB Ram and 2GB swap file. when i synthesize my design, the dc cannot use swap file to synthesize and i cann't finish my project
You can help me
hello all,
Who can show me how to fix this warning when i use design_compile to report power in a design
Information: Updating design information... (UID-85)
Performing power analysis through design. (low effort)
Warning: There are sequential cells with no output activity annotation. (PWR-96)...
Hello,
If you run ldv on Windows, you only click to /waves.shm/waves.trn to open waveform, and if you run ldv on Linux you can type "signalscan&" and view waveform.
And then the LDV4.0 is the best for Window and LDV5.0 is the best for Linux
Vinh
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
