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thank you sree205 for answering me, i cant use a fifo with 8bit width because with my quartus software i cant design a fifo with 16bit input and 8 bit output, the width of input and output must be the same,
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thank u zerox, yes if i'm working with xilinx it will be...
i want to convert my signal from the output of fifo from 16 bit to 8 bit because i need to transmit it via the rS232 that support only the 8 bit
so who can help me to do this task
if it is possible a logic circuit because i m working with block diagram in quartus software of altera
ok i have to simulate my fifo, how informations are written into, so i need to use internal signals, but i tried to add this signals but when i click simulate i didnt found these signals?
does anyone has an idea about this?
FIFO with qu(at)rtus megawizard
ok thank you for this, i will try it now and i will tell you what happen with me
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oui ça marché
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sorry, i forgot the language
i mean, ok it works, the delay of recievieng is now correct
FIFO with qu(at)rtus megawizard
for the data i want cut off with 128 samples my adc is 80Msps.
and for the reception for the moment i really need when the fifo is full to start reading
Added after 1 hours 5 minutes:
ok, finally i have found the shema necessary to recieve my information
now...
FIFO with qu(at)rtus megawizard
ok, i want use a fifo to save the samples obtained from my 8bits adc.
then get back this samples and send them to the PC via an UART RS232
ok the second part(UART RS232) its not necessary ihave the module
for the first one i want write all samples in the fifo...
FIFO with qu(at)rtus megawizard
sorry if i m bothering you
firstly,does my shematic allow me to get my purpose?
if not can you help me to obtain a good one.
FIFO with qu(at)rtus megawizard
thank you, but i didnt understand how do u have get the wrclk and rdclk? and usually the output is not availble
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i mean thatther is no value in the q output
FIFO with qu(at)rtus megawizard
in fact my input is the output of an ADC i want to get this signal, save it in my fifo then get back the samples and send them to the pc via rs232
i work on altera startix board
for the clock i have 2 clocks but i didnt find the problem
FIFO with qu(at)rtus megawizard
but i don't use the wrfull i want just use the wrempty and rdempty, Morover i think the problem is due to the read clock
Hi, this is the first time that i participate in this forum and i hope that u can help me.
I have created a FIFO with the Megawizard of QUARTUS II.
I have used a double clock FIFO with 2 bit input, a write_request, a read_request, write_empty and read_empty signals.
I tried to simulate i have...
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