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Recent content by Herang Sayo

  1. H

    How to generate a ramp voltage in Cadence SpectreRF (or AMS)?

    How to generate a ramp voltage in Cadence SpectreRF (or AMS)? I am designing a compartor and need to give a ramp voltage at one of its inputs, the other input being a dc voltage. Can anyone suggest me ideas to generate a ramp voltage. Thank you.
  2. H

    Capture time and Lock time of PLL

    HI, I am designing a PLL, and I wanted to know if I could get any formulae for the lock time and capture time of the PLL. I tried looking in Razavi's book, but cannot access it dont know why! if anybody could write the formulae here then it will be a great help. Thank you.
  3. H

    VCO phase noise is too bad, need to improve it

    Hi, I am designing an LC-VCO, using the pMOS transistors for the current mirroring.
  4. H

    VCO phase noise is too bad, need to improve it

    Hi, I am designing a VCO in Cadence, operating at 2.4GHz, its phase noise is -47.4 dBc/Hz. How can I improve it?

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