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Recent content by hdkwan

  1. H

    LDO transient response 0.1ns rise and fall time

    Re: LDO transient response I never see that kind of formula before... lol... I'm still an undergrad student... hehehehe Added after 1 minutes: sorry, i read the result wrongly. it was 44ns faster than another design. not 44ns settling time... hhehehe.
  2. H

    LDO transient response 0.1ns rise and fall time

    Re: LDO transient response 0.35 divided by your edge time (you wrote first 0.1nsec!) = Fbw to 3dB_ this is my source:-) I never see this formula, where do you get this? in the ieee paper titled "An Improved Fast Transient Response Low Dropout Voltage Regulator" by Mohammad Usaid Abbasi...
  3. H

    LDO transient response 0.1ns rise and fall time

    Re: LDO transient response I am trying to design a fast settling LDO. The settling time should be around 100ns (0.1us). I feel that if the load transient itself is much slower than the settling time, the measured settling time may not be correct. Where do you get the 3GHz figure?
  4. H

    LDO transient response 0.1ns rise and fall time

    LDO transient response Hi all, I am trying to design an 1A LDO. I am using 0.1ns rise and fall time for my load transient. Is the time too short? Is there any application that has 0.1ns rise and fall time? Thanks.
  5. H

    LDO transient, reducing the undershoot

    Re: LDO transient yes, i was thinking about putting the cap in parallel. But I am using the ESR for stability, if i put the cap in parallel, then it will affect the stability. What do you mean by bulk capacitance?
  6. H

    LDO transient, reducing the undershoot

    LDO transient Hi, I am designing an LDO for 1A load. Output voltage is 1.8V I am using 10uF cap and 1ohm ESR resistor. during transient the undershoot of the output voltage is 650mV. Problem comes when I try to insert 20nH ESL inductor to the output cap. The undershoot with the ESL can be as...
  7. H

    output capacitor of LDO

    ldo explain How should we choose the size of the output cap?
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