Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
HI ,
I am planning to use Xilinx FPGA Spartan-3 to interface with the Z80230 ESCC.I want to encapsulate 2 Mbps data into HDLC format using Z80230. What should be the frequency of PCLK? what are the registers contents of ESCC.?Any application notes available on Z80230 register configuration...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.