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Recent content by hari_lhr

  1. H

    does cgywin support linux fully

    I am not able to use commands like find..whereis..whatis..etc
  2. H

    does cgywin support linux fully

    i have found some commands of linux are not working in cygwin.. but most unix commands are working .. does cygwin support linux fully or is there any better software avaliable freely
  3. H

    how to run unix on windows xp

    virtual unix for windows Is VMware one such software?
  4. H

    how to run unix on windows xp

    run unix on windows xp is there any software which can be installed on windows xp....to practice unix or linux ..without installing the linux or unix OS...
  5. H

    help me with this error message

    not an entity name Thanks for the concern... I had changed the component names accordingly throughout the code (for all modules) and i dont get the error <application had encountered....> but now when I try to get the testbench waveform for the code which i gave earlier i get error.. Line 49...
  6. H

    help me with this error message

    port_main.h:127:1.13.276.1 ya i changed the code ..used teh appropriate names ..but of no use ..still the same result
  7. H

    help me with this error message

    hdlparsers 709 As far as the entity names are concerned.ie..divide instead of divideby2..because i have already defined entities divideby2..etc..in other modules.. Added after 29 minutes: ya the other codes are working i fin the problem only with this code..i think the problem is with the...
  8. H

    help me with this error message

    xilinx hdlparsers:709 Ya i am a starter ..in VHDl ..but have quite an amount of confidence in the subject though. I had first created .vhd files using xilinx and had sumulated it with ..ISE simulator, Modelsim, and Sonata too..there was no problem initially But the problem arised only after...
  9. H

    help me with this error message

    error:hdlparsers:709 this is the code which is generating this error..even the xilinx support quotes the error to be known issue ..plz suggest library IEEE; use IEEE.std_logic_1164.all; entity transmitter is port ( din: in bit; clk: in bit; pout: out bit ); end...
  10. H

    help me with this error message

    hdlparsers:709 when i try to check the syantax of the code i get this error message ..plz help me resole it ..i am using xilix 7.1i and am working on vhdl Xst:Portability/export/Port_Main.h:127:1.13.276.1 - This application has discovered an exceptional condition from which it cannot recover...
  11. H

    Please help me with the project in USB transmitter

    hey friends plz help me out to finish my project on USB transmitter the code is in attachment i had created entities for all the components ...like regarray..Datamux.. created txtopmodule created testbench do i need to write any other code ..plz help
  12. H

    plz help me solve these erors in xilinx project

    xilinx name could not be resolved All the components like "RegArray", "DataMux" etc have RTL but in the end the implementation fails bcoz of some error..i mentioned earlier
  13. H

    plz help me solve these erors in xilinx project

    +synplify +ngdbuild:604 hi may i tell u wht i have done... 1. i created entity and architecture for all the components i mentioned 2. grouped into components in "txtopmodule" then wrote the rest.. i dont undrstand how to work on the test bench.. i just got the code from my frnd try to comment
  14. H

    plz help me solve these erors in xilinx project

    process translate did not complete ise i am attaching the code..plz tell step by step how to do it in xilinx....plz don't use very high technical language while explaining u can find the code at
  15. H

    plz help me in USB project using VHDl

    thanks for the help..but it doesn't solve the problem.. plz see the code and tell me the stp by step procedure to execute it..plz i am new to xilinx and vhdl

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