Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I'm having the same problem. CDS_LIC_FILE and all other environment variables are properly set. I was using version 16.0 and was working ok. I can run layout without any problems. It seems to be only for OrCAD Capture and Capture CIS. Also, I can see the Capture.exe consuming 25% of the CPU...
I need help/info on a fully differential SC comparator. It compares two sets of signals (Vin+, Vin-, and Vref+,Vref-). The architecture consists of 4 preamps (gain ~ 4) + latch. I want to have stages 1 and 2 together with Output offset storage and stages 3 and 4 together with Input offset...
folded cascode matching
Check the book Design of Low-Voltage Low-Power Operational Amplifier Cells by Ron Hogervorst. Also check this pdf. It has all the Pelgrom's equations and offset equations for the folded cascode OTA.
www.utdallas.edu/~hellums/docs/EE7331/Fall2007/Matching.pdf
The circuit has the following parameters:
Check the circuit www.ece.uprm.edu/~s988025/pub/bandgap.png
Is=10^-15 A
dVbe/dT = -2.2mv/C
Temperature coefficient of 1500ppm/C
Voltage Coefficient of 100ppm/C
I'm not sure what is the relationship between the output voltage (Vref) and the...
power dissipation cadence
Hello,
I'll like to know if the value for the power dissipation given in the Cadence IC result brower (pwr under finalTimeOP-info) for VDD is a good approximation of the dynamic power dissipation. My problem is that the average current drawn from VDD times VDD is not...
In general do a fft of the signal (remember fftshift) extract the fundamental signal power and sum the noise power. Then do Signal Power/ Noise Power. Check this MATLAB code:
George
Re: comparator
I suggest you to do search in google and ieeexplore.ieee.org for articles in high speed comparators.
**broken link removed**
**broken link removed**
**broken link removed**
George
power spectral density matlab
Here is a simple but good MATLAB code to obtain the Power Spectral Density (PSD) plot of Sigma Delta Modulators. It also computes de Signal-to-Noise Ratio (SNR) in dB. An example data is included with instructions on how to use it. Any questions please let me know...
I agree with fxxjssc. Record the data and code a simple fft routine in matlab. Also you can use the National Semiconductor WaveVision 4 software.
www.national.com/appinfo/adc/wv4.html
This software is inteded for their boards, but it has the capability of importing data from files (like .dat...
Re: How to reduce the effect of HD3 in delta sigma ADC&#
I think that for most cases its due the amplifier deffective settling due finite GBW, finite DC gain and slew-rate. By improving these parameters the third harmonic in most cases is reduced. Several books and articles provide information...
Hello
I have done some of this but using Verilog-A as the modeling language. For matlab is quite simple, construct the stage with simulink blocks (e.g. comparators, quantizers, gain stages, add nodes, subtract nodes, delays etc.). Then just interconnect all the stages. If you don't have...
simulink jitter
Hello,
Check Dr. Piero Malcovati's and Dr. Simona Brigatti's toolboxes at Matlab file exchange central. If you can't find the jitter model you're looking let me know i have some simulink noise models for sigma delta modulators...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
