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Firstly, thank you Franck
you mean i will creat one logic pat in HDL, then link it with footprint of the connector. I know it will work, but it is not as convenient as just adding output port symbol to pins of part, therefore, can i do it with output port in standard library of HDL?
Hi, everyone, i am newer to cadence. Now, i encounter one problem.
As i learn Allegro, i know that it is netlist driven, so, if i have one 10 pins connector in Allegro, i should have a correspondence of it in HDL, but in my schematic, the correspondence of connector is just output ports or...
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