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Recent content by gold_2007

  1. G

    Urgent Slew & OCV clockgating jitter skew doubt

    How do we arrive at slew , derate values .I mean based on what slew limit are derates values are decided ?R they depends on technology nodes ? When clock gating helps in minimizing temperature then y we not consider clockgating helpful in minimizing leakage ? What r the factors that affect...
  2. G

    anybody use SYNTEST for DFT

    does it come in virtual scan
  3. G

    DFT (MENTOR GRAPHICS)

    In my netlist which violation if i remove my coverage increases . can u pls tell how to remove the vioaltion also . following are the violation C3 --> 73 violation D5 --> 744 D7-->97 E4-->60 E5-->260
  4. G

    anybody use SYNTEST for DFT

    does SYNTEST accept purely VERILOG FILE
  5. G

    D5 violation (DFT) MENTOR GRAPHICS

    hi how to overcome D5 violation
  6. G

    anybody use SYNTEST for DFT

    Syntest doesnt have GUI so how u trace to the root cause of violation
  7. G

    What is a STIL file (.spf) ?

    stil spf standard how is it genertated
  8. G

    What is a STIL file (.spf) ?

    what is STIL(.spf ) file .
  9. G

    anybody use SYNTEST for DFT

    Hi, Is there any one who use SYNTEST tool for DFT . How many of you are involved in DFT . Does DFT has good future ahead .
  10. G

    design for testability : JTAG

    hi how can a dft engineer makes out whether the netlist has jtag in it . What steps should be taken it it has jtag in it in both dftadvisor and fastscan. thanks in advance
  11. G

    design for testability : FASTSCAN suggestion

    Hi when i give run command in fastscan i get a warning with very low coverage //warning contention on (137777), number patterns rejected = 32 i have added to resolve this . is it fine SET COntention CHeck OFf what should i do .
  12. G

    How to know how many scan chains do I need for a chip (DFT)?

    Re: DFT question more the number of scan chain , more is the number of input pin and less testing time .
  13. G

    dft question (pls answer )

    Thanks ramesh and all
  14. G

    How to improve coverage of shadow logic testing?

    Re: shadow logic testing how to do this in mentor graphics
  15. G

    What is the best tool out there for DFT?

    Re: DFT tool Dftadvisor and fastscan by mentor graphics . the new version dftvisualizer is too good
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