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Recent content by GoaGosha

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    CST ideal patch antenna problem

    Hi Guys, Do you have any idea why this design is not working in CST. It is idealized patch antenna.For some reason I see that the discrete port can't excite PEC objects (S11 -> infinity) Please help.
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    Please help on RFIC spiral inductor simulation results

    Hi, Look on smith chart - to see if it is capacitance resonance. Then it may be the capaciatnce to box. Try to increase the box - if your boundaries are all PECs try to modify at least the top ones to Radiation boundary. Hope it helps, Gosha
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    What Linux version supports HFSS 9.2?

    Re: What LINUX for HFSS Hi , We run HFSS 11 beta on SUSE Linux - seems to be fine. But layout editing done on windows machine. Hope it helps, Gosha
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    inductance calculation and formula

    If you have access to IEEE see that one(it's well known inductance calculation algorithm ) : IEEE TRANSACTIONS ON PARTS, HYBRIDS, AND PACKAGING, VOL. PHP-10, NO. 2, JUNE 1974 Design of Planar Rectangular Microelectronic Inductors H. M. GREENHOUSE, SENIOR MEMBER, IEEE Also if you have access to...
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    New IC EM simulator integrated into Cadence

    So the error will be determined by the amount of far fieled differences between 'current element field generator' and 'dipole field generator'?
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    New IC EM simulator integrated into Cadence

    Huge Thanks Jim. One point that I'm not sure I understood is: "approximate the far field coupling between subsections by assuming the current generating the field is an equivalent dipole. For many useful circuits this is OK. At some frequency, it is not OK" Are you talking here about...
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    New IC EM simulator integrated into Cadence

    This tool is new so I don't expect people here having expirience with it. I was actually more interested theoretically, I'm sure that people deeply in computational EM will see few apparent weaknesses in above paper. Thanks
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    effective dielectric constant

    Ansoft Designer - never used Momentum - yes it's correct after substrate calculation the green fuction exist and layers height doesn't bother you anymore. Sonnet - I think 100nm(which are common in sub-micron processes) height layers will slow down the simulator and you will not get actually...
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    effective dielectric constant

    Wiley - I want to see you simulating in HFSS 40 layer stackup with some layers of 100nm while your simulated instances 500um. Basically Wiley is right but it depends on problem. In the field of RFICs it is common to use effective dielectric.
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    effective dielectric constant

    The simplest and ,as it practically turns out in ICs, also accurate thing is use equivalent series plate capacitor model. For instance : C_total = C1||C2 (C=E_o*E_r*A/t) E_r_total/t_total= (E_r_1/t_1)||(E_r_2/t_2) E_r_total - is your effective diel. Enjoy :)
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    New IC EM simulator integrated into Cadence

    Cadence gradually introduce their integrated EM solver for RFICs. As I understand the basic concepts of that solver can be found in this doc: www.cadence.com/community/virtuoso/resources/LargeScaleBroadband.pdf It would be interesting to hear all the disadvantages of that tool. ( the...
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    metal fill inside inductor

    It's about time to try again :). But this time be sure the metals are has Mu_r = 1 as in metals on chip such as gold,copper,alumnium (They have Mu_r very close to 1). Probably in your childhood you used Iron which have Mu_r = 4000 or some other metal with Mu_r > 1 these metals can store energy...
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    metal fill inside inductor

    The inductance will not be effected - it is magnetical property and floating metals not effect in any way on Mu_r. Commonly Q degrade a little bit due to chnage in Effective E_r of surrounding. Dummies better to put outside the inductor. Regards, Gosha
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    Why does the inductance decrease in lower frequencies ?

    Re: inductance question Yes, montera is rigt about the decrease it's really skin effect, there is additional mechanism edge effect (in case the wire cross-section is not circular). The increase is due to resonance in which the whole impedance of inductor branch become very large compared to...
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    Ground ring setup when simulating inductors in HFSS

    Hi, Ruri : If you have actual ground ring in design, it's perfect for HFSS. In this case ground ring is not parasitic due to simulation or test chip but real part of wich will be included in your design. I don't know if HFSS is reliable for solenoid (i don't have expirience ) but it surely...

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