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Recent content by Gaurav Sarode

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    Error in Verilog problem

    hey thnx FvM n atulaxc i got the sequential accessing thing... - - - Updated - - - hey thnx FvM n atulaxc i got the sequential accessing thing...
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    Error in Verilog problem

    I want to store N*3 matrix on FPGA kit RAM i.e. dont want to geenerate hardware for it. and den access these matrix rows one by one pls help
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    Error in Verilog problem

    how to do dat???
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    Error in Verilog problem

    Is there any way to use designed hardware for operating on matrix saved in RAM on FPGA...
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    Error in Verilog problem

    I have implemented it on MATLAB n now trying it on FPGA. Because repetitive comparison operation in algorithm m facing problem in it. In MATLAB it was done with two nested for loops...
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    Error in Verilog problem

    @FvMThanx for reply I want to perform image segmentation for that i have to compare the pixel color value with all the other pixels color values, so i have saved the pixel color values in ROM and want to get following two tables from it here in first table H stands for population of frequency...
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    Error in Verilog problem

    @Fvm I want to implement iterative operation on FPGA...and m not getting a way out of it pls help ---------- Post added at 08:00 ---------- Previous post was at 07:59 ---------- @Fvm I want to implement iterative operation on FPGA...and m not getting a way out of it pls help
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    Error in Verilog problem

    @ Akhilkumar Thanx for ur rpl I have made changes that u suggested but still m getting errors, m using Quartus II the errors are as follows Error (10170): Verilog HDL syntax error at imp.v(28) near text "gt1"; expecting "<=", or "=" Error (10170): Verilog HDL syntax error at imp.v(29) near...
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    Error in Verilog problem

    Hello everyone I am implementing Image segmentation on FPGA, for that i have to compare the pixel values with each other. I have stored image pixel values in ROM, and now want to put them in RAM and simultaneously compare them with previous entries in RAM.I have written this code given bellow...
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    Image Segmentation Using FPGA

    Hello Everyone I am doing project on color image segmentation, I have to operate on pixel color values of image. I have written code for the blocks required but i dont know hot to put image matrix on FPGA RAM ???? And how to call these values from memory on Kit I am using CPLD Cyclone II...
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