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Hi,
Understood. However, now I have the following questions:
1) Why do you say I may ignore reverse current for now? Is it overestimated by the simulation?
2) How can you say the current due to Cds is 4.5 A?
3) How could I improve efficiency?
Many thanks
Thanks, that does reduce the spikes, but it also reduces the system efficiency. Moreover, I'm trying to increase the switching frequency to 100 kHz in order to reduce the filter, but I can't get it to more than 83%. What do you you suggest I do?
Regards
Hi,
I'm simulating the following a class D amplifier as shown in the image. The PWM driving scheme is bipolar (25 kHz), the load is 20mH+1.9R, the driving resistors and the dead time (250ns) correspond to those of the gate driver I choose.
The actual transistor I'll be using is the CSD18540Q5B...
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