Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Thank you for the replies. Unfortunately I have only the interface DDR4_if, all other micron files are encrypted. How can i connect each internal interface signal to the VHDL instance ports?
Sorry but I'am not familiar with (System) Verilog.
I have downloaded a system verilog DDR4 simulation model from Micron and want to use that in my VHDL testbench.
The interface of the system verilog DDR4 memory model from Micron:
// MICRON TECHNOLOGY, INC. - CONFIDENTIAL AND PROPRIETARY INFORMATION
interface DDR4_if #(parameter...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.