Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
you cna .fft syntax in HSPICE manual
fft is based on DFT, so you need to take care about
transient step for consistence to resolution.
Generally speaking, Fres (frequency resolution) is smaller with long simulation time due to larger window size. The analyzed frequency range is up to NP* fres (...
About the method by ramp up supply, it is not exactly confirmed if the circuit can work. It is because the node is unknow when power ramp up. The method to ensure if it works is to keep supply constant(VDD) as well as set initial conition at critical point to have zero initial current.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
