Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by fighter

  1. F

    Use chipscope to capture some signals from my FPGA

    Hey,everybody,i'm suffering by useing chipscope ,would you like to show me some suggestions with my appreciation! my enviorment: 1,fpga :virtexII xc2v3000 2,eda tool: ise5.1 3,chipscope :4.1i or 5.2 I want to use chipscope to capture some signals from my fpga, but i cannot configure fpga...
  2. F

    xilinx xcv3200e always resets reset

    fpga reset i use xilinx xcv3200e for asic verification,after the target was configured,and i run some programs,the fpga was always reset, i dont know why????????????plus:i configurate the fpga with parallel download cable,i just guess the pc LPT's signals did it!!!!!I'm not sure! anybody like...
  3. F

    I need documents for fsk protocol .

    fsk_signals_demod.pdf I 'VE GOT IT. THANK YOU VERY MUCH.
  4. F

    I need documents for fsk protocol .

    fsk protocol when i design a soc ,i will realize communication interface with FSK 1200-2200 .i found the obvious phase shift occur on input signal, how much degree phase shift should be tolerance? I need documents for design fsk protocol .
  5. F

    How to open the switch of macro definition in ise4.x/5.x?

    ise4.x/5.x hi,anybody knows how to open the switch of macro defination in ise4.x/5.x series software,i use xst to synthesis the verilog code,because my codes have some ifdef...else ...endif,but ise seems like not to support this kind of defination?is it right?any solutions?thanks!

Part and Inventory Search

Top