Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I guess I understand.
Having a given memory location (e.g 0x6000) means that I can write code like :
(*(char *)0x6000) = 'H';
(*(char *)0x6001) = 'i';
(*(char *)0x6002) = '!';
(this is just an example, I wouldn't code it like that)
So if I understand it correctly, it means that FSMC cares...
Hello,
I am using an STM32L496ZG, and 1MB of SRAM (this one : **broken link removed**)
My first idea was to use it with GPIO registers to control it. Like using GPIO_ODT to write the address I want to write to, and ODT again to write the data at this place.
I guess for SRAM it is a very slow...
Hi,
I already verified all the things you pointed out and ran a design rule check with no error.
All the footprints have been verified too, and for the dimensions I don't remember everything except the smallest track is 0.254mm wide, and the connector on the right is a basic 2.54mm 2 holes...
Hello,
c_mitra : Q1 is a P-channel mosfet to protect against reverse polarity.
Klaus, thank you for those precisions. I am having a hard time visualizing how I could implement a ground star point in this layout, but I think it is not a big deal anyway for my applications.
So do you think this...
Hi,
I think I get what you mean, so I separated the feedback trace from the current feeding trace.
Am I good with this ?
I did'nt fill the bottom layer ground so you could see the bottom layer trace (SW) a bit easier.
Thank you
Hey,
I understand the things you pointed out, but I'm still a bit confused about what a Kelvin connection really is in the end.
Anyway I tried to follow as much as possible your advices, I came with this. I think it is a bit better than the first one, and that's for me very close to the limits...
Thanks !
I see. I tried an other design yesterday, removed the vias for now, and modified it in GIMP because I don't have my CAD software available right now.
Do you think this technique might be better ? SW is not running under device, but goes on bottom layer (We assume there is no ground...
I apologize, I completely for the datasheet. https://www.ti.com/lit/ds/symlink/tps562208.pdf
Yes I get it, I will modify it as soon as possible. The reason why I did draw the schematic like that is that I followed datasheet's schematic. But it's not very conventional indeed.
Thanks
Hi,
I'm trying to layout a SMPS that gets 12V, ad outputs 3.3V. The maximal current will not exceed 1 Amp.
I would like to know what you think about this layout, and if there is major or minor issues.
More importantly, I am a bit confused about a line in the datasheet saying "5. Do not allow...
Hi KlausST,
Oh yes I found the information in notes, in 2M x 8bits mode, pin 45 is used as A20.
Thank you very much for those explanations.
Have a great day.
Antoine
This is awkward. I don't understand how I missed that. Ok so no problem in the end. I want to use my 1M space so I will use all the addresses pins.
Just a little question. If the range is from 0x0 to 0xFFFFF, how can you achieve 2M with 20 pins on this chip ? (link below)
Is it because each...
Hi,
I have a few questions a SRAM external chip I want to use.
It has 20 address lines, from A0 to A19. It should mean that my address range is from 0x0 to 0xFFFFF. Since this is a 1024K-8bit array, I guess my real usable range is 0x0 to 0x3FF.
Does it mean I use only pins A0 to A9 ?
Does it...
You are probably right. I am a S.E student, and next year I would like to start an E.E course. I bought The Art of Electronics to start learning basics.
Anyway I don't start this project before being confident about the basics, which is why it is only theoretical for now.
Anyway thank you a lot...
Yes I can imagine. I am just evaluation depending on the worst case scenario.
After reading a bit more about how instructions and clock cycles, I learned that a clock cycle is not just 1 bit but the size of the MCUs bus (in my case 32 bits)
So I guess writing to PORTB which is 16 pins, equals 1...
Sorry I meant 16 GPIO.
I think I get where I'm wrong. If a port is 8 bits, it means that writing something like PORTB = 0b01010101 takes 1 instruction ?
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
