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Recent content by farrokhiyan

  1. farrokhiyan

    STM32- F103 model I2C different result in Debugger vs Run

    Hi friends, I'm working on data exchange between my stm32-F103 and atmel AT24C02 serial EEPROM on my starter board. I have did the programming based on I2C peripheral and DMA. the pull ups are 4.7 k. when I debug the program the result is fine and the data inside the EEPROM come out but when I...
  2. farrokhiyan

    Fiber IGBT HCPL316j gate driver

    Hi vermes, would you please send me a schematic view of your IGBT gate driver by HCPL 316J you have upladed in Aug 2011. It seems interesting for me. Thank you so much. Farrokhiyan.
  3. farrokhiyan

    question on telephone line interface circuit

    Dear goldsmith, frankly I've noticed that it can be a snubber but the way it is being used can provide a path for ac voltage of ring signal that was my second question. Dear Betwixt, the important thing is the path which the ring signal can induce to other side of transformer. can't we use them...
  4. farrokhiyan

    question on telephone line interface circuit

    Dear friends, the below image shows the line interface of a dial up modem. the DC loop, ring detector, isolation transformer and hook relay are clear. the question is what does the RC circuit (shown in red) do? when modem is not in operation and a ring signal comes, don't you think the high AC...
  5. farrokhiyan

    autocorrelation of two signals

    autocorrelation dear freinds, what is your evaluation from this autocorrelations of two signals. the important for me is the amplitude of the noisy samples between the repeated samples. neglecting the high amplitude repeated samples, can i suppose it a random signal? what about this...
  6. farrokhiyan

    I/O Buffer (IOB) vs. Global Clock I/O Buffer (GCLKIOB)

    gclkiob How can I instantiate a Clk signal to a standard I/O buffer (not global buffers)? what is CLOCK_DEDICATED_ROUTE ?
  7. farrokhiyan

    I/O Buffer (IOB) vs. Global Clock I/O Buffer (GCLKIOB)

    clock_dedicated_route Hi all, Would you please tell me what is the difference between standard I/O Buffer and Global Clock I/O buffer? how can i explicitly instantiate an I/O Buffer component for each top-level I/O signal in xilinx ISE? tnx.
  8. farrokhiyan

    High-Order Sigma Delta (for DAC) or EF Sigma-Delta

    Hi, I am also designing a 2nd order EF structure by VHDL. I've Read Mr. Peter's theory and I agree with you. I'm not sure yet. The structure adders show overflows but I don't have any idea about stability. I'm in doubt for my correct design.
  9. farrokhiyan

    Looking for Accurate VHDL-based simulation of Σ&amp

    Re: Need IEEE Paper The link which you mentioned was removed.
  10. farrokhiyan

    Looking for Accurate VHDL-based simulation of Σ&amp

    Need IEEE Paper Hi all, Would you please send me this paper: Accurate VHDL-based simulation of ΣΔ modulators Castro-Lopez, R.; Fernandez, F.V.; Medeiro, F.; Rodriguez-Vazquez, A. Circuits and Systems, 2003. ISCAS apos;03. Proceedings of the 2003 International Symposium on Volume 4, Issue ...
  11. farrokhiyan

    need a simple source code

    Hi all, I'm a beginner in vhdl. i need a simple source code for digital integrator in vhdl which is synthesizable on FPGA. can you help me? tnx.
  12. farrokhiyan

    Need formula for sigma-delta modulator

    Hi, I need a formula of sigma-delta modulators, which makes relation between these parameters: 1- Input signal Amplitude, 2- Order of modulator, 3- Number of levels of the Quantizer, 4- OSR thanks in advance
  13. farrokhiyan

    Data converters SNR Calculation

    Hi fxnviri, could you clear the link ? tnx
  14. farrokhiyan

    Data converters SNR Calculation

    snr calculation Hi all, Can anyone provide me the methodology for Delta Sigma ADC/DAC SNR measurement in simulation? I used SD Toolbox from Mathwork, but i didn't get the true answers. i'd like to measure SNR for some DC input signals. would you please help me to know the principle of SNR...
  15. farrokhiyan

    Help on this Block of SDtoolbox

    Hi, could you tell me what is this block in SDtoolbox,please? is it as same as a quantizer? how does it work? what is the DAC and ADC output lines? what is the usage of ADC line in an all-digitall sigma-delta modulator modeling? how can i use this block? especially in determinig the N-ADC...

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