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Recent content by faiq khalid lodhi

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    Cadence Layout VS Schematic

    Can you please share the circuit. because without circuit it is not possible to advice you.
  2. F

    Circuit problem please help

    Answer for 1. Follow the example on slide 16-25 of the following link. http://www.docstoc.com/docs/25127194/BJT-Transistor-Circuits Answer of the 2nd problem : the following link will be helpful for you. http://www.allaboutcircuits.com/vol_3/chpt_4/10.html
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    how to convert the Spectre results into .ps or .pdf format

    Can you please tell me the procedure to print the file into .ps format. i have tried but i was unable to print it into the .ps file and got the following errors./ "Plotter in not mentioned"...................... i have tried to select the plotter but it has not any options. "Page size is not...
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    how to convert the Spectre results into .ps or .pdf format

    Hi every one. i would like to save the Cadence Spectre results into high resolution format. Can anyone give me any idea.
  5. F

    DAC (digital to analog converter)

    i am really interested in this topology i shall be very thankful to you if you will provide some basics
  6. F

    verilog A code of the DAC

    @ pancho_hideboo thankx for providing the helpful link.
  7. F

    DAC (digital to analog converter)

    but in very small technology i.e. 65nm the it is very difficult to make the DAC by using the charge sharing. So can any one suggest some solution of this problem.
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    verilog A code of the DAC

    can any one provide me example of the verilog A code of DAC.
  9. F

    DAC (digital to analog converter)

    can any one provide me the basic circuits of the DAC in Cadence without using the resistance.
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    Frequency to voltage conveter using digital gates

    i do not think so because it is not possible for me to use RC circuits on chip.
  11. F

    Frequency to voltage conveter using digital gates

    hi every one can any tell me that how can i convert the frequency into the voltage by using the digital gates only.
  12. F

    mobility of NMOS and PMOS for 90nm

    thankx for all who help me in order to find out the mobility of 90nm technology. i have found the following values in my SPICE model. µ0(NMOS) = 500 μA/V² µ0(PMOS) = 200 μA/V² which are similar to the values that Erikil has posted in this thread. and by using this i have to calculate the Cox...
  13. F

    mobility of NMOS and PMOS for 90nm

    can any one tell me the mobility of NMOS and PMOS for 90nm

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