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Recent content by esoteric1

  1. E

    ask some references about bandgap

    These links are a good place to start: **broken link removed** **broken link removed**
  2. E

    Questions about designing LDO

    Re: LDO questuionair??? Here are some appnotes on LDO stability and configurations. Hope these help. Another file at this link:
  3. E

    PLL Design Steps (25 Points)

    I posted the frequency synthesizer design course at this link: #1039631 Very helpful in designing PLLs.
  4. E

    Detailed design flow of PLL

    Re: design flow of PLL Here is a course by PE Allen on frequency synthesizers. Very helpful in design of PLLs and the individual blocks in building the PLL.
  5. E

    Help me calculate the device size of CML/SCL latch design and simulate the gain of it

    Hi I am trying to design a CML/SCL latch. If I want a 700mv output swing, I assumed that the common mode input range of the latch for "IN" is atleast from VDD to 'VDD-0.7V'. The reasoning behind my assumption is that I will use the latch to form a Flip-Flop and a divider which requires the...
  6. E

    collecting all kinds of latch structures

    This lecture should help you somewhat: **broken link removed**
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