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butterfly twiddle factor
please help me to solve a problem when implement fft on fpga ,i write codes for butterfly module but when i multiply with twiddle factor i face aproblem of increasing multiplication output bits evey multiplication process please help me to solve this problem please...
i can not find the two links**p://file.21ic.com.cn/DSP/DSP_with_FPGA.ziph**p://
pleaaaaase help me ,send me the files on my e mail
ahmmansour@hotmail.com
thanks fot y
hi, i going to implement ifft on fpga i know i need complex multiplier and addition but how determine the resolution of fft output (number of bits of i/o) also how to make test to my desgin if y have code for this 8 ifft but i will make 64 ifft but to able to understand the code project send...
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