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Recent content by eng_Semi

  1. eng_Semi

    Where to start learning VHDL-AMS?

    Hi ALL, I would like to learn VHDL-AMS, so how can I start? Regards, eng_semi
  2. eng_Semi

    bandgap important problem

    For the second question, you have to choose a unit resistance so that both resistors can be composed of it For example, if the resistor values is R1=1k ans R2=11.2k then if u choose 1k to be ur unit resisiance, R1 will be composed of one resistor R2 is 11 units in series + 5 units in parallel...
  3. eng_Semi

    VLSI job market in Middle East

    my profile in www.iti.gov.eg.com SWS new name is Si-Ware Systems
  4. eng_Semi

    VLSI job market in Middle East

    vlsi opportunity in egypt It is an Egyptian comapany
  5. eng_Semi

    VLSI job market in Middle East

    ic design egypt Si-Ware Systems (SWS) is a provider of analog/mixed-signal / RF design solutions and IP for ASIC development in different application segments. SWS combines a very strong analog/mixed-signal and RF IC design expertise together with an extensive experience in mixed-signal...
  6. eng_Semi

    how large is N=40 in PLL?

    This is not large at all
  7. eng_Semi

    Problem with installing NCSU kit 1.5.1 on IC610

    ic610 cannot see layout for pcells What is the NCSU kit???
  8. eng_Semi

    Where can I download ee240 lectures(2007) provided by Boser?

    Re: Where can I download ee240 lectures(2007) provided by Bo you can download the video lectures from https://webcast.berkeley.edu/course_details.php?seriesid=1906978393, you can download the videos using flashget program.
  9. eng_Semi

    how to caculate the filter's parameters

    check National application note AN1001, you will find in it the equations by which you can design the loop filter.
  10. eng_Semi

    Bias Circuit IN OPAMP

    It sets similar Vds for both NMOS and PMOS current mirrors
  11. eng_Semi

    phase margin in the fractional-N PLL

    you should check your phase margin using the arithmetic mean or the geometric mean of N Arithmetic mean = (Nmax + Nmin)/2 Geometric mean = sqrt(Nmin*Nmax)
  12. eng_Semi

    CMOS Analog Circuit Design

    I think that you have to be more effective in our forum, so that u can gain some extra points
  13. eng_Semi

    Help me increase the PSR of a BGR

    Re: HELP: BGR PSR power supply rejection means the gain seen by a signal injected from the supply node, you need to measure this in order to have a figure of the circuit immunity to supply noise (noise on supply rails due to digital activity on other paths which are coupled to the vdd rail) u...
  14. eng_Semi

    Noise simulation using Specter

    choose noise analysis and choose the output node (on which u need to measure the noise), then choose the input source of noise (which is noiseless), then run noise analysis

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