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OC1 and OC2 optocoupler pin 4 (collector of the npn transistor inside the opto) is pulled up to the supply, and the same is also driving the A/B
The transistor inside the opto works as an resistor-based inverting buffer.
If you are referring to transistors Q1/Q2/Q3, their base is driven through...
If you are okay with just the keyboard and mouse, this might work. Option 2 is good enough. But remember effectively you are unplugging and re plugging the devices and they need to be re-enumerated. This is the same approach I am taking in my design. However I have a need that I already have a...
I did not understand the LOW signal levels not low enough? The opto transistor is fully off or full saturation as no biasing is done. So I expect to pull the Node A/B to full low through overriding 1k resistor. Collector emmitor resistance is quite low compared to 1k @5v I am able to go below...
Update,
With 74HC4052, FS devices are also working perfectly. So this design is good for both FS and LS devices.
Tested with the PCB as in previous post, so definitely, CD* version is slower compared to HC/HCT version.
Additional to this, I added some optocouplers and fully isolated the...
You are suggesting of an open drain control like the failsafe (power isolation) circuitry of I2C? Definitely for a full blown product it might be a good point to consider. Unless the Vcc of 4052 is connected anywhere but floating, (i do understand the esd diodes get fwd biased) where would the...
The logic level shifter boards available in market are not bidirectional. The usb D+/D- needs full bidirectional (analog) connectivity between host and device.
I also tried the FET method. (BSS84 + 2N7002) And make my own discrete TranGate but the discrete FETS what we get in the market are all...
Oh you refer to that? :) I got it confused with X/Y
The connector on A/B is an off board connector, where I solder jumper wires, which I connect to my bluepill (STM32F103X uC). They aren't floating, and the bluepill also shares the same gnd line. This is a quick (and dirty) design I made to...
Will floating A/B inputs add any cap loading? I thought they were the other end of the turned off TGs and keeping them floating should be okay.
Also, I did not understand the point on adding the third gnd pad and reference for A/B inputs? Could you explain it a bit more?
Datasheet of CD4052...
Definitely, I agree that matching trace indeed is an issue, as I thought so. But what I read in the CD4052 (Note the CDxxx) that the max frequency response at - 3db was 13MHz could this also be a reason? Should I try with HC Series?
Hi I Tried the CD4052 route. Schottky diode to join VBUS works.
This CKT is working excellent for low speed devices (1.5Mbps) . FS devices (12Mbps Datarate), is unable to cope up with....
or could it be my badly designed PCB?
I also tried FSUSB73UMX. I am unable to get it working. :(...
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