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Re: clock and data recovery
I am familar with Xilinx, so I have no idea for other families, but i think they are quite the same. In Xilinx, the is no integrated CDR part; however, luckily there are some App Notes such as : xapp224, xapp250, xapp868, ... very usuful for CDR applications. Also...
To me, embedded system ralates to dedicated applications, including typical parts : manage(control), communicate(connectivity, network), process data (DSP, analyze data, ...)
2 factors are considered when using embedded systems are : compactness and speed (realtime)
A complex system may like...
Does anyone have the paper
Design of an IPv6 SOHO router based on embedded Linux system
Jenq-Muh Hsu; Chian-Fei Hsu; Chung-Ming Huang
Advanced Information Networking and Applications, 2005. AINA 2005. 19th International Conference on
Volume 2, Issue , 28-30 March 2005 Page(s): 827 - 832 vol.2...
Hi all,
I am at the first steps studying embedded system. I have had Lite5200B Board with the chip MPC5200 (PowerPC603), but i can't find any Linux Kernel support this family on the Internet and the procedure to download it as well as writing my own apps on this platform.
could anyone help me...
Hi everyone, i have a question when read the spec of a optical equipment, that is what is line code 1B1H, i have never heard of it, and even seach it by google i have no answer as well. anyone know can help me. Thanks
Hi all of u, I've had some trouble with the concepts : coherent and non-coherent transmission in digital transmission system, and what is difference between them. Anyone know can explain it to me. Thanks a lot
hi every one, i am developping project about microwave , one E2 data stream, and i have problem about generator polynomial of scrambler for E2 data stream, i don't known which generator polynomial is best, and is used the most in data communication system, you can send to me some...
scrambler vhdl
I am writing a program about seft synchronous scrambler (meaning that not need synchronization - data stream (A)-> scrambler -> descramber -> restore the same origin (A)) with generator polynomial : x^7 + x^4 +1 but when simulation , i see dataout not the same data in, can anyone...
FEC IC
Hi all members, anyone know FEC IC : Reed Solomon (RS) code and decode, convolutional code and decode and interleaving and uninterleaving code and decode. I've known some IC but also i've seen using them quite difficult especially continuous data stream , for example i am using...
Re: recover clock from digital data stream have specific fre
firstly, thank EDALIST for your help, but as i see : on Xilinx has some solutions about CDR :
XAPP224 - Data Recovery - but output quite special (see more detail on this App)
Xapp250 - Clock and data Recovery with coded datastream -...
I have some trouble with problem : from digital data stream have specific frequency (such as E1 - but it is decoded HDB3 - only 1-5V, 0 - 0V) how to recover clock of stream ( the same phase, freq is specific) using FPGA detail on Spartan 3 of Xilinx, some people say to me using DCM (Digital...
fpga+boot
Hi all of you! I am a newbie in FPGA, i want to ask you the progress FPGA boot (detail i am working with FPGA of Xilinx) , as i guess : firstly, there is a boot loader load configuration data of FPGA from Flash to SRAM, sure that , and then, after a period of delay time and there...
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