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Anyone can help me?
In order to add bi-directional pads in my gate level netlist,i wanna use dc to insert automatically.
How should i write my scripts for this and what are the coding principles for bi-directional ports in rtl source code?
Thx
Re: what is dft library?
sorry
what i mean DFT refers to "design for testability"
and i know DFT library contains many cell model and mapping descriptions ,just as what richardhuang have released.
and my puzzle lies in that where can i obtain the DFT library? from the foundary or the user's...
virtual clock synthesis
hello all
in the multi-clock synchronous design synthesis, there will be virtual clocks for IO port constraints ,when we use it ?
can anyone expand more?
regards
drizzle
Can i just use the singal command" compile -boundary_optimization" to achive the synthesis results what we have expected?
or
wheather it is a must or not?
when u added the sdf in your simulation,the delay of design can be showed
if u just compiled the .v lib in your sim tool,that should be ok,just show you function verification
it will be realized with start simulation menu in modelsim.
about DC tool
hi sam
if I have tow designs and two tcl scripts for synthesis
and my DC tool have one core,as i known, the rate of synthesis partly depended on the DC memory volume
and when i do synthesis for these two designs simultaneously, my issue is
whether or not these two design in...
hello all
Does Design Compiler tool can deal with two different designs simultaneously?
Weather different kinds of design can effect on another or not?
regards
drizzle
sdf annotator user guide
i have checked the path again and it's ok
sdf is generrated after sta with paramistics file using primetime
does simulation tool can report some indications if sdf file has some syntax errors?
In compared with sdf generated after systhysis, there are a litter changes...
vsim-sdf-3251
it is the post-simulation after P&R completed.
when i do post-simulation, a error occurs which interrupt the simulation
the log lists here:
# ** Error: (vsim-SDF-3445) Failed to parse SDF file "D:/test/move/moving_picture.sdf".
i have no idea about what problem...
hi
Some materials said that we cansolve the bus'es stuck at fault problem by putting pull-up resistors on bus
why?
and also the practise can deal with the bus'es low power too.
why?
anyone can explain it for me?
thanks
drizzle
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