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Re: vhdl data types
Cyboman,
Actually you are right. At the end all will be '0's and '1's. Before the end. When you are describing your idea/comcept on a abstrect level then is really useful if you have predefined functions for example with signed or unsigned variables. Then it is much faster...
Hi Kumar,
In your command prompt go to your xilinx installation directory:
<drive>:\Xilinx\<version>\bin\nt and from there run compxlib.exe
for example:
compxlib -s questa -l all -arch all -lib all -w -dir C:\my_xilinx_questa_lib
In verdion 12.1 you have even a GUI where all options can be...
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