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Please take care of your planning of pin connections:
- The block pins alignment will reduce the total wire-length and DRC also.
- The channel between sub-blocks should to be plan enough for both pin-to-pin connection and other power connection.
- Clock pins should be place in center of...
Re: FloorPlan
1. floorplan size?
- die-size, clearance and core size.
2. utilization?
- percent of utilization vs # of cells
3. complexity?
- # of macros, # macro types
4. power distribution?
- power mesh/trunks/rail ...
5. pad-ring and analog interface ...
Hi, Please try to run the 'fix opt global' command. You should make sure your constraint is done and so relax for external paths. Send me the timing reports if you want to get more details.
, denmos
vinh.camau@gmail.com
Hi,
Before detailed placement, all cell have illegal locations, and all of cell have "floating" attribute will be consider on the placer. Please check and make sure your cell's attribute is not "fixed". The data model commands on below are useful for you to debug the error:
data get $cell...
Re: Magma Blast and Talus
Johnson,
Have you have a music account? I have already login and loaded the docs from the site. try to use the https on your site address. The documents are not available for public, thank for your understanding
, Denmos
Re: Magma Blast and Talus
Magma have user support site names 'Molten.magma-da.com', you can refer the documents for free. Talus and Blast are most advanced tools I learn. The design engineer will take the stdcell foundry given file to volcano library using library preparation commands (Magma...
fix time magma
Regrading your questions, I think you should read carefully about Gain based synthesis documents ( that come from Magma binary and application notes). For Super-cell model, Magma Blast modeled that virtual cell base on cell footprint (with the same functional and voltage...
site:www.edaboard.com talus
This come from the synthesis methodology. Talus use the Straight Based to fix load, logic optimizing and buffering at earlier flow since Blast used Gain Based methodology. Usually, the straight based improve your critical delay paths up to 20% (vs the gain based)...
The new release of Talus is ready to load via MUSIC case form. The application note about multi-mode multi-corner is available on Talus documents and MUSIC also. If you have registered a Magma Molten account, you can load this document (that is free :=) )! I can not share this doc for you all...
Hi, Hope something on the below are useful:
1. Force keep, force maintain subblock model before fix time
2. Define subfloorplan for soft-macro and place the soft-macro on the top floorplan.
3. Place pin assignment for soft-macro, create top-level power routing (top-down flow)
4. Pushdown...
How much do you have? Why don't you deal with the design service to tap-out that chip for you.
I think that is cheap for temporate license (Magma or Synopsys). So if you want to buy the license, I suggess the Magma-da. They have also Magma-EA engineers to help you run the tool quickly.
Thanks
Re: skew
If you mean clock-skew, you can refer the answer in below.
Clock skew is difference from highest insertion delay and lowest insertion delay of clock tree.
You should build the clock-tree better to increasing clock-skew. Don't separate the clock tree if possible! Or you can search CTS...
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