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like I said, for alinks version >5, you need the ECADs translator, for version 4 you need the Alinks Integrator. it will integrate to your layout tool... and you can export it directly to alinks, SIWave, HFSS, Q3D, etc. I dunno if there is a standalone though.
hi guys, why are you converting to ascii? do you have the ECADS? it is way simple with that :). what other export (convert) options do you have? I used to use the alinks, but since it was replaced with the ECADs...
Hi espresso,
For typical antennas:
WiFi central Freq (fo) is 2.44GHz with a Bandwidth (BW) of 80MHz.... that gives a range from 2.4-2.8 GHz
UMTS fo is 1.955GHz with a BW of 140MHz... that gives a range from 1.885-2.025 GHz
if the antenna is well designed it will filter the UMTS signals... so...
I was in the assumption that if you want to use lumped ports you need to be in driven terminal and not in driven modal.... maybe switching the mode you can fix your problem.
Hi guys
for the GDDR5 memory you have a mirror function, you need to set some pull-ups and stuff but it can be done :). I think for other type or RAMs you have something similar... there are several things you can do to improve your density, as mentioned above you can increase the layer count...
hi Randy
in the menu, go to HFSS-> Design Properties
there you will find the list of all the variables you have defined and you can change the value and the units.
I hope this is what you are looking for :)
-D
in SIWave you can simulate the PKG of a chip, you can use also HFSS and Q3D from Ansoft. if you go for any of these directions, you should use the Ansoft Links tool to import your bondwires/solderballs/layout/etc. For higher freq you should use HFSS, if your structure is electrically short...
resonance analysis of pcb
Hi N.Raghavan
as the interconnections in a PCB are made of copper and with a fixed distance from ground (return path), they have RLC components and it can act as a tank circuit with an specific resonance frequency (https://en.wikipedia.org/wiki/LC_circuit), when you...
well, the first step is to know what are you going to design and the general speed buses.
then you should know if you have any manufacturing constraints (such as lead free assembly, HF compliance, overall thickness, etc.) with that in mind you select a material (typically, your first selection...
resonance analysis
I know SIWave from Ansoft can perform this kind of simulations, unfortunately I don't know much about it... also you can use Links (also from ansoft) and export your board file from Allegro to ansoft utilities (in this case SIWave)...
hope this helps
-D
high speed data lines length tolerance
Hi,
There is a rule of thumb that says clock signals should be routed as short as possible, that is partially true, as dipnirvana said, it depends on the slew rate and frequency.
The best way to go is to perform a line length sweep analysis in spice...
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