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Is the sys_clk of MIG is provided by the ddr3 sodimm board?
what is the frequency of the clk provide by the ddr3 sodimm board?
and what is the io standard of this signal? thanks!
how to eliminate the dedicate TEST_MODE pin of the chip, and share it with a normal function pin? for test mode I can pull it to certain value to enter test mode.
Do I need to use a latch to do this?
thanks!
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