Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
I have an inverter chain with 10 inverter in HSPICE format. I would to decide what's the max frequency that it can operate. Currently, I the tphl (delay of high to low) and tplh (delay of low to high), and calculate the tp=(tphl + tplh)/2. I would like to know if this is the correct way...
Hi,
I am using SIS tool ( URL is embedded.eecs.berkeley.edu/Alumni/pchong/sis.html )
but I am unable to understand how the arrrival time and required time are calculated in the tool. I believe it should not be too difficult since SIS use very simple delay model. Can anyoue who are familiar with...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.