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Yes, all the diode have their own well .
Thanks for both of your suggestion.
dick_freebird, thanks for your detail suggestion, it gives me a way
to find out the bug of this circuit.
HI :
I have a charge pump circuit like Fig. , from the simulation result it can pump up
to the 12v , but in real measurement, i find the block cannot pump to the high
voltage. The question is it really hard to find the bug on the wafer, anyone who
have ever design the charge pump, can...
oscilloscope
Hi:
there is a question as below
According to the figure at right, the input couples of the two channels are both at DC mode. If we want to observe the voltages across the two resistors via CH1 and CH2 at the same time, is it feasible to connect A to 1, B, C to 2, and D to 3...
Re: charge pump
Thanks for your reply,
The PMOS device use HVNWELL, and it is my circuit.
I think it is what you mean, but the circuit have the leakage problem.
thanks
Re: charge pump
Thanks for your reply,
from simulation results it seems function work with PMOS, but when really used
it cannot pump the voltage up, and have large leakage current.
I still cannot find the reason for the phenomenon.
Thanks.
charge pump
HI :
I have a question for a charge pump circuit
The topology shown in FIg1. with NMOS can replace for the PMOS ?
It seems no used with PMOS ?
Thanks .
Hi :
I got a circuit , used to generate the reference voltage.
The body of the depletion mos was connected to the ground.
From the simulation result, that the threshold voltage of the depletion mos will
increase from negative to positive , and make the depletion mos into cut-off region...
need for start up circuit in beta multiplier
HI:
I have got a circuit like below , it was a current mirror used for bias
The problem is that i have never seen a circuit like this
Anyone who has ever seen the topology like this , pleas give me a help
THX!
bandgap reference
HI :
I am trying to design a bandgap , and the topology is like below ,
The supply voltage is between 2.4 to 5.8 (v) , and i use .6um process
The temperature is vary from -40 to 130 degree
The opamp that i used has 75 (dB) gain and 60 phase margin...
Switch Capacitor
Hi :
I have a question about SC integrator like the Fig. shows below
The opamp is a fully differential folded cascode type, and supply voltage is "VDD" and "GND" .
My question is, when i give a sinusoidal input (VDD/2 +/- 10mv ), the opamp input
still has no bias...
Hi :
I have a switched capacitor integrator, and i try to find the op-amp finite gain.
The one way is give a "dc" input, and check out the saturation output voltage.
(From the transfer function (z=1, DC), can get the finite gain of op-amp)
But, if the integrator is a "correlated double...
Thanks for your reply :
Do you mean if i use fully-differential structure,
the output of integrator will not step up if i apply a positive voltage?
But will set by common mode voltage, so i need to simulate it in frequency domain.
thanks
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