Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by cnivaz

  1. C

    Question about the behaviour of an I2C which is acting as a master

    Re: i2c master behaviour If the slave finds, the incoming address is not belongs to it, immediately it will respond with NACK. If master once find the NACK from the slave for address phase, master should not retransmit the address, or if the slave NACK is for the data phase, master can...
  2. C

    Count the number of 1's

    Dear Team, I need to do the design , that will count the number of 1's in an 32 bit register. I done this using the counter,but that took 32 clock pulse to produce the result. Without consuming 32 clock , how to do this design. Regards Nivaz
  3. C

    what is metastabilty state ? is it analog or digital?

    Dear Bhavs, Metastability is a state between 0 and 1. Its a analog.
  4. C

    ALIGN Primitives in SATA

    sata align primitive Hi All, Can anyone explain me what is the use of ALIGN Primitives in SATA. When it is reqiured to Transmit. Regards Nivaz
  5. C

    Looking for materials on serial ATA PHY Layer functionality

    Serial ATA PHY Layer Hai , I am new to Serial ATA. Can any one send/share me the material regarding PHY Layer functionality. Thanks and Regards Nivaz
  6. C

    Help me with AMBA - AHB design

    ahb design Hello all, Currently iam working on AHB Master interface design. I have some doubt on retry and split. My burst length is 8. After sending the 5th beat , iam receving retry/split from the slave. If i get the bus grant again , i need to start the transfer from the begining or from the...
  7. C

    What is meant by Running Disparity in Tx/Rx ?

    Hello All, Can any one tell me what is meant by Running Disparity in Tx/Rx Case,and how to implement that. Where can i get a meterrials regardign this. Thanks and Regards Nivaz
  8. C

    One hot encoding with combo logic

    how to check one hot encoding Hello, How to check the data , whether it is one hotted or not, with combo logic. Assume that the data bus width is 32 bit. I tried to implement in sequential logic , it consumed 32 clock cycles to find the result. Thanks and Regards Nivaz
  9. C

    Looking for materials about SATA verification

    Hi, Currently i have assignd for SATA verification . but i am new to SATA. Where can i get the materials for that. Thanks and Regards Nivaz
  10. C

    Synchronization in multiple clock domain design

    Hi all, Iam working on multiple clock domain design. Say Module A works on 50Mhz and Module B works on 100Mhz . Module B is driven by outputs of the Module A. I need to flop the Module A signals. Shall i go for synchronizer using 1 flip flop or 2 flop synchronizer. Thanks in advance. Regards...
  11. C

    FIFO Depth Calculation

    fifo depth calculation How to calculate the FIFO Depth based on write and read frequency.
See more

Part and Inventory Search

Back
Top