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Hi, thanks very much for the reply. In the initial block, should I actually say
"V(integrand) = V(bj)"?
And similarly, for the integral,
sIntegral = idt(V(integrand),0.5)
rather than just using "integral" alone?
Hi,
I'm running verilog-a for the first time and trying to get the following code to work:
analog begin
if (sIntegral > 0)
integrand = V(bj);
else
integrand = 0;
sIntegral = idt(integrand,.5);
$fstrobe(fprt,"%f", integrand);
$fstrobe(fprt,"%f", sIntegral);
etc.....
The behavior I...
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