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Recent content by cjrathi

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    SYNC and CLK Generator

    Hello All, I want to generate LRCLK and BCLK signals for testing in one of my project. Requirement is they should be in sync of each other i.e., falling edge of both clocks should be same. I can use dual IC 555 (LM556) and generate these two clocks in astable mode, but will they be in sync...
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    Generating separate 5V supply for Analog supply

    Yes. I have that option, but 5.5V will be non-standard input. I want to power up the system with standard 5V adapter.
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    Generating separate 5V supply for Analog supply

    Hi, I am designing a board which requires 5V (digital), 5V (analog), 3.3V, 1.8V and 1.2V supplies. Initially my plan was to take 12V as an input and generate all these supplies from separate DC-DC switcher. The only reason for not taking 5V as an input is that I need separate 5V to be generated...
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    HFSS - PCB Antenna Design

    Attaching the snap., where highlighted area is what i am considring as patch
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    HFSS - PCB Antenna Design

    Hello PlanarMetamaterials, Thanks for your reply. If I keep gnd plane just on bottom, how would I connect the patch gnd to bottom gnd.?? For assigning lumped port as feed, should I take it from substrate to feed entry point on top??? Thanks, Chaitanya
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    HFSS - PCB Antenna Design

    Hi, I am designing a 2.4GHz PCB antenna (F-type). Snap attached. This design is already verified at 2.4GHz, since i have seen it in one paper. I want to design similar kind of antenna for 2.4GHz and 5Ghz band, but before starting that I want to simulate existing designed and proven antenna...
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    CPW fed patch antenna

    You need to play around with length, width of CPW line. Changing length and width of substrate should not matter much if substrate is > that patch dimension. There is some option in HFSS, wherein you can vary any parameters (ie you can define range of h,w,t, etc) and start simulation. After...
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    How to add pin to a new footprint

    Which PCB design tool you are using ?
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    [SOLVED] Minimizing RF radiations and leakages, shielding 3-stage 90dB RF Attenuator

    Overall PCB thickness is 2mm. Top layer Rogers thickness is 10mils. Rest h is FR4. We did 2mm overall thickness for design purpose. >>CR
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    [SOLVED] Minimizing RF radiations and leakages, shielding 3-stage 90dB RF Attenuator

    PCB Material used is Rogers+FR. Thickness is 2mm. It seems the power level is so low that it starts coupling through substrate itself after 60dB. Even just via fencing wouldn't have worked for full 90dB range. It needed full isolation thr cuts. Actually our prev working design all had cut and...
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    [SOLVED] Minimizing RF radiations and leakages, shielding 3-stage 90dB RF Attenuator

    Hi .... Thanks for your all suggestion. The actual issue have been found out... Actually there was stage to stage coupling through the substrate itself.. We isolated each stages by cutting the board except at RF trace section... and guess what it worked linearly even after 60dB attenuation...
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    [SOLVED] Minimizing RF radiations and leakages, shielding 3-stage 90dB RF Attenuator

    So is it okay to just keep the absorber within the cavity? Is it necessary to keep cavity length lamda/4? What should we consider f for lamda? Max operating f? >>CR
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    [SOLVED] Minimizing RF radiations and leakages, shielding 3-stage 90dB RF Attenuator

    I will try to retest with RF absorbers. But will have to use conductive adhesive . Right ? What does section to be lambda/4 mean exactly? >>CR - - - Updated - - - Okay I will try that. Right now I am using series RF Cap of 5.6pF. I even removed those RF Caps and shorted them using solder...
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    [SOLVED] Minimizing RF radiations and leakages, shielding 3-stage 90dB RF Attenuator

    RF blocking CAPs for control signals are at the bottom side. As far as no. of vias/ vias spacing is concerned, it is as per the working design. I tested newer board in another case with 1mm compartment width of small tunnel size. Getting same performance. It seems - There is no issue with...
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    [SOLVED] Minimizing RF radiations and leakages, shielding 3-stage 90dB RF Attenuator

    Hi-- Input power level is well within chip specs. I have already tried to contain the leakage of SMA connector by proper soldering, even outside the box at the panel, but still no improvement. I guess lid is also sealed very tightly. But still I soldered all three cavities from top with thin...
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