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Thank you Dominik,
I use 180nm process and WPE is not a problem.
As u can see I have ratio 10:1 between TN1 and TN0 but 8:1 between TN2 and TN3.
When I was doing spectre simulations I had 10:1 current mirroring for 8:1 MOSFET ration, Vth(TN2)=335mV and Vth(TN3)=346mV.
Also I have 80 fingers...
Hi everyone,
I am new on this forum and relatively new on analog design.
I finished layout design of my low-voltage current mirror (100:1). I used 2D common centroid for better matching. After extraction spectre gave me Vth=335mV (346mV in schematic) for my unity MOSFET TN3. Everything else is...
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