Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by cineq

  1. C

    Which electrical motor for self balancing robot project

    Yes, I know that there are used 12V DC motors, but I am thinking if there is better choice. For balancing purposes it is important to have big torque near point ZERO of balance. The problem of brushed motors is that they have low torque at low speeds. Stepped motors have high torque regardless...
  2. C

    Which electrical motor for self balancing robot project

    Hi all, I am going to build self balancing robot. I want to have construction gabarites similar to: http://www.danielbauen.com/balancing_robot/images/balancing-robot.jpg I have a question about electrical motors for weels, because I met a lot of different examples. What will be the best...
  3. C

    SPI protocol using Xilinx System Generator

    I think I understand... I understand that my first sim: **broken link removed** was wrong - i start first bit when SCL goes low, but I shall start it when it is already low? So I have to increase the SCL period 2x or 4x because I'm not able to start first bit when SCL is already low. It is...
  4. C

    SPI protocol using Xilinx System Generator

    Yes I agree, but I've also checked the simulation under "free runing option" (where FPGA is operating asynchronously to the Simulink simulation) and got the same answers... Thank You but I don't understand. In first sim I change SDI during high SCL, but in the second I change it during low SCL...
  5. C

    SPI protocol using Xilinx System Generator

    Hi All!! I want to communicate with GYRO L3G4200D **broken link removed** I'm communicatinhg with this device using Xilinx System Generator and debuging via co-simulation hardware option. I was able to generate waveforms which are conformable with SPI protocol for this device: But as you...
  6. C

    Signal prdata cannot be synthesized, bad synchronous description.

    hmmm I thought that ADRS will increment only once after the delta time... if I use variable instead of signal and at the end of the proces I'll write ADRS <= variable ?? will it help? zapis :process(CLK2) variable adres : STD_LOGIC_VECTOR (15 downto 0):=(others => '0'); variable i,j ...
  7. C

    Signal prdata cannot be synthesized, bad synchronous description.

    Hello I have the same problem. I'm new to VHDL. I tried to find what is wrong but I have no idea. When I'm compiling only this part of code everything looks to be OK, but while compiling whole project I get "Signal prdata cannot be synthesized, bad synchronous description." Pls help me... code...
See more

Part and Inventory Search

Back
Top