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Recent content by chwpark

  1. C

    Synchronous/Asynchronus Reset?

    Async RST: if(rst = '1') then sig1 <= '0'; elsif(clk'event and clk = '1') then .......... Sync RST: if(clk'event and clk = '1') then if(rst = '1') then sig1 <= '0'; else ....... end if; Notice 'rst', 'sig1' and 'clk'. Do you understand? good luck chwpark
  2. C

    Clock recovery problem with FSK demodulator

    You can get some information in the attached docs. good luck chwpark
  3. C

    Hardware Modeling Using VHDL - Downloads

    Thanks, jimjim2k it's realy useful post. especialy, info for VSS&DC setup reards, chwpark :D
  4. C

    [SOLVED] On the PLL Phase Noise+Application

    *^^* Very thanks. it's very usefull to me. and very important my work(622M,2.5G). once more thanks reagrds chwpark
  5. C

    Bypass Capacitors Choosing

    very very thanks, hwswboy your post is very helpful to me once again thanks, regards, chwpark
  6. C

    anybody know where can i download s*ynp*l*fy for linux?

    hi~ go to http://www.model.com and download.
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