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check that the modulus 5 of the input is zero. If so the number is divisible by 5.
VHDL = if (input mod 5) = 0 then output <= 1 else 0;
verilog: always @(input)
if (input % 5 == 0)
output <= 1;
output <= 0;
or something like that. My VHDL is a bit rusty, so you will have to sort out...
Sorry richdavies, I cannot even find the old version through my normal access channels, nor is it in my list of uploaded files. I think this was a special version that came through a different source
You need to leave the baud rate at its default of 115200 and make sure yo hold down the PWR button during the entire sequence. You will find much more information in the following thread: https://www.edaboard.com/threads/182804/
I would use an FPGA-based SOC with UARTS built in the FPGA fabric. That way you can have as many UARTS as you need. My suggestion is the Microsemi SmartFusion AFS050. Dev tools are free and design should be straightforward. The micro is a Cortex-M3 @ 100MHz
This is the only 5128A firmware version I can find. I do not know if it is correct for you. Please check your existing version and satisfy yourself that it is correct before applying it. Nor can I tell if it will help you or not
The firmware posted above is the latest I can find. As far as I know (which isn't very much) EAT is always supported and there is no special firmware version to support it, but I know nothing of multi-tasking support
Attached are the Dev IDE 1.07, which is the only version I can find and an old...