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Recent content by chico

  1. C

    How to use IP compile by vlog to do simulation in top level using ModelSIM?

    Modelsim question Hi aji_vlsi, I have instantiate the encrypted IP and vlog vsim my_top, but it cant find the IP. How to include these encrypted files, it seems simply instantiate is not enough.
  2. C

    How to use IP compile by vlog to do simulation in top level using ModelSIM?

    I have an IP compiled by vlog with -nodebug option, how to use these compiled files to do simulation in top level. Thanks!
  3. C

    Can scan_test_mode pin share with other pin?

    In scan test mode the pin is used as scan_test_mode, innormal mode is used as other function.
  4. C

    how to control the register output name in DC

    Thank you stormwolf, these command are exist already. I find this phenomena is on QN output only register, and the Q is disapper, how to prevent DC optimize these Q ouput disapper?
  5. C

    how to control the register output name in DC

    A is a 6bits register, in the output netlist, the registers' output are n12,n32,n35,etc. I want the result are A[5], A[4] …… A[0], what should I do? Thank you!
  6. C

    how to define the clock frequency when synthesis and sta

    how to define the clock frequency when synthesis and sta, 120% max work frequency? Why? thanks!
  7. C

    why area after insert scan chains is smaller compile -scan?

    Is it possible? Or my flow is incorrect. Thanks!
  8. C

    how to preserve subdesign interfaces when insert_dft

    "set compile_preserve_subdesign_interfaces true" is only effective during compile, set which variable or use which command to preserve subdesign interfaces when "insert_dft"? Thanks.
  9. C

    formality unmatched points

    formality unmatched Hi straw, I use version X-2005.12
  10. C

    formality unmatched points

    formality reference unmatched In rtl code there are a 8 bit reg and the reg[5:3] have a constant value "0", in netlist these three bit were TIEL, but formality reports these three bit unmatched points in reference object, why? What should I do now? Thanks.
  11. C

    how to do bottomup scan synthesis in DFT compiler 0509XGenv

    HI jitendra, report_test command is not supported in XG mode and I use report_scan_path -cell all instead, the cells are actually present in design. I use U1/1 instead of TOP/U1/1, the same warning message reported, maybe some other reason exist, thank you!
  12. C

    how to do bottomup scan synthesis in DFT compiler 0509XGenv

    I do bottom-up scan synthesis with synopsys DC Version X-2005.09, when I stitch scan chains at top level like this " set_scan_path chain1 -view existing_dft -scan_data_in PAD_TIN7 -scan_data_out PAD_TOUT7 -ordered_elements {top/U1/1, top/U2/1} -complete true " it report "Warning: top/U1/1, is...
  13. C

    why dont_use jkff when synthesis

    why dont_use jkff when synthesis,thank you!
  14. C

    how to deal with the internal tri-bus in dft design

    Thank you very much, its very helpful to me, thank you!
  15. C

    how to deal with the internal tri-bus in dft design

    but in my design,the tri-bus is bidirectional, what should I do now
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