Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello,
If it is PMOS Source ,drain ,bulk : VCC ,Substrate : Ground .
ESD can be positive strike as well as negative Strike .
If it is positive strike ,well to substrate junction will be broke down ,ESD charge will be bypassed to ground.
If it is negative strike ,well to substrate...
Re: High speed amplifier
...here you can use current buffer compensation for compensating Amp Without loosing Amp Speed significantly .Here assumption is Amp is two stage[First is gain stage & second is class-AB] &Amp has to drive huge load cap and compensation cap is placed between first stage...
Re: High speed amplifier
Hello ,
The available best solution for designing High Slew Rate /Ultra low power bias current Amp is using Class-AB output stage .The available Class-AB output Topologies are Floating Current Source biased Output Stage & Source Follower type Output stage .each have...
Hello ,
Generally compensation of Amp will be done for good Phase margin .This good phase margine gives better settiling time when Amp used in feedback.
definetly compensation also a feedback ..but this feedback has to apply only on Amps who are having better phase margin .
Ex : In Two stage...
hello ,
At ADC oversampling fundamental assumptions are : Quantization noise samples are statistically independent [uncorrelated ] and signal samples are correlated . So, quantization noise samples will be added under square root where as signal samples will be added linearly .which is SNR...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
