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Recent content by bubu_not_taken

  1. B

    Spread spectrum clock generator using dcdl

    Can you show me an example of the verilog syntax, so I could change the period of the clock signal using these delay cells?
  2. B

    Spread spectrum clock generator using dcdl

    Thank you, for your response! But I'm trying to change the Period/frequency of the clock signal, not just to delay it. I believe it can be delayed just by passing it through some buffers. Thank you!
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    Spread spectrum clock generator using dcdl

    Hello! I'm trying to implement a spread spectrum clock generator using a digitally controlled delay line in Verilog. The basic idea is that I'm trying to modulate the period of my clock signal using some and_gates that each have a delay value assigned to them. The delay network just delays...
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