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Recent content by bit4man

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    Newbie/hobbiest question: VHDL simulator unexpectedly shows "X" (forcing unknown)

    I guess I never looked at the test-unit as part of the whole. My fault. I am curious - I thought the compiler would error out when there was multiple drivers? I didn't see one here? Is there a way you can get the Vivado IDE to help identify issues like this? I imagine complex projects would be...
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    Newbie/hobbiest question: VHDL simulator unexpectedly shows "X" (forcing unknown)

    I've created a few "how to learn" VHDL projects in Vivado, and started a quest to control a simple TM1638 that I have no problems with using a MCU, but it seemed a good project to get better at FPGA programming. For now I am using VHDL - that's what I started learning - and what I have right now...

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