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The impedance of analog and single ended digital signals have to be same when the objective is to have no reflections ? I have 50 ohm impedance for analog traces but I am wondering about the impedance of single ended digital signals. Any idea ?
When we powered up any circuit using a standard power supply V+ and GND then power supply serve as voltage source and the current will be drawn according to the load.
What is the practical example of current source ? How to get or generate 1 mA current source ? Is it possible to connect a...
The datasheet says 0.5C/mW self heating. Could you please suggest in which configuration should I use PT1000 to measure the temperature between -50C to 200C
Sorry, I come up with same question regarding biasing of PT1000. Which one of the following method is more practical to measure temperature between -50 C to 200 C. I have to use approx 2 meter cables for PT1000.
A battery source of 12 V connected to one 1K ohm resister, the other end of the...
I have DM-310 PT1000 sensors. The data sheet under the following link does not provide information about maximum current.
https://www.farnell.com/datasheets/1918818.pdf?_ga=1.258259402.1552879086.1472543622
I am using this command to simulate.
vsim -t 100ps -voptargs=+acc source_lib.design_tb
I tried 500 ps but this gives error of invalid design which I guess maybe due to ram block which I have added in my design. Anyhow I will try to use optimize functions in the vsim command.
@ ads-ee...
I am running simulation at 100 ps resolution for 5000 m sec but it take more than 30 hours to complete the simulation.
Is there any way to speed up the Questasim simulation ?
How to maintain the Group order in the wlf file ?
I have a group "ck_generator_i" in the simulation but the group option does not work while logging for wlf file. Ultimately I have to use log the waves without grouping as shown below.
add wave -position insertpoint -group ck_generator_i...
@Warpspeed, the refresh rate of 75 Hz means that there should be a v_sync pulse 75 times per second but what should be the duration of each pulse ? Seconldy I could not understand 64 Khz horizontal line frequency. I guess this is the frequency of the h_sync pulse within the frame but again what...
The monitor which I have accept the signal 1280 x 1024 @ 75 Hz which need pixel clock 135 MHz.
http://tinyvga.com/vga-timing/1280x1024@75Hz
Is it possible to drive the VGA Signal for the monitor mentioned above from the FPGA at slow rate like 30 frames per second ? In this case what will be...
I have generated VGA signal, both data and timing (RGB and v_sync, h_sync) at the rate 60 Hz from FPGA. The frame size consist of 640 x 480 pixel. I have tested the signals v_sync, h_sync by connecting them to LEDs on board, which works fine but there is no output on the screen just screen turns...
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