Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
prime time and multiple clock domains
By default, Primetime does not care that the two flops are clocked by different clocks. It will
happily do timing checks on those paths. You should disable those paths and/or analyze
them separately. One way to do this is with the following PT commands...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
